YU yuning,SUN Lingling,LIU Jun
(Key Laboratory of RF Circuit and Sy stem,Ministry of Education,H angzhou Dianzi University,H angzhou 310018,China)
With the rapid growth of the wireless communicationm arke,tsilicon-based technology has been recognized as a suitable choice for design of radio frequency integrated circuit(RFIC)for its low-cos,thigh integration and easy to access[1-2].For circuit design,the accuracy of device model strongly influences the prediction of the circuit performance.Lots of issues need to be considered for the development ofMOS RF mode.l Compared with the work for digital or analog appl-ication[3],both the intrinsic and extrinsic parts of the MOSFET device need to be accurate characterization at high frequency.
Extrinsic series resistances as an mi portant para meter of deep-submicrometer MOS transistor when operating at high frequency,it influences both the dc and radio frequency(RF)perfo rmance ofMOSFET,it also influence input/output m i pedances and noise perfor mance of the MOSFET in the RF reg mi e,therefore it should be modeled accurately.Prel mi inary,characterization of extrinsic series resistance was based on DC measuremen.t However,inmost of compactmodelswhich include BS IM3 and BS IM4,the source resistance and drain resistance are deter m ined by NRD and NRS,nu mber of square units of drain region and number of square units of source region,multiplied respectively with their square sheet resistances of diffusions(RS H).Thismethod isnot accurate enough pointed out in Re.f[4].Recent years several methods have been proposed by utilizing S-parameters measurement and Z-or Y-para meter analysis to extract series resistance[5-8],all published RF characterization methods canwork properly to extract the extrinsic series resistance co mponents when in the RF measurement noise is not considered,de monstrated in Re.f[9].In this paper such a procedure has been presented,and the scalable equationsof the resistanceshave also been developed by using various transistors of different channel lengths(L),channelw idths(W)and the nu mber of gate fingers(NF).
Fig.1 shows the conventional smal-l signal equivalent circuit of an RF MOSFET with source and body ter m inals tied together,.i e.,incorporating the extrinsic component and the intrinsic componen.t Extrinsic componen:t gate resistance Rg′,which represents the effective lumped gate resistance,and consists of electrode resistances and distributed channel resistance;the series resistances Rsand Rd′, which represent source and drain te rm inal resistances that consist of via resistance,the salicide resistance, the salicide-to-sal-i cide contact resistance, and the sheet resistance in LDD region[8];substrate componentsmodeled by using resistanceRdbin series with capacitance Cdb;gate to source,gate to drain overlap capacitances. Intrinsic compontents:consist of the intrinsic capacitances,gate to source,gate to drain and drain to source capac-i tancs,.i e.Cgs′,CgdandCds′,and thegmandgdswhich represent the transconductance and outputconductance.
Fig.1 Smal-l signal equivalent circuit for a RFMOSFET
In this work,the devices were fabricated using commercial 0.18 μm 1P6 MCMOS RF/Mixed signal technology process.S-Para meterswerem easured using Agilent E8363B VectorNetwork Analyzer(VNA)and CASCADE Summ it probe station, transistors were measured with the body tight to source at frequency ranging from 50 MH z to 39.05 GH z.System calibration was performed using four steps SOLT (Shor-t Open-Load-Thru)method.Open and short structures were carried ou,tin order to de-embedding the parasi-t ics introduced by the GSG PAD and interconnec.t
After de-embedding the parasitics S-parameters were converted to corresponding Z-parameters to extract smal-l signal ele ments using the method inRe.f[5]:
B,AsandAdare expressed as functions of intrinsic para meters and they are constant values at fixed bias.
From above equations,source and drain resistances can be dete rm ined by using curve fitting tomatch the data over the measurement frequency range respectively,because the frequency lm i itations of the Vector Network Analyzer can only capture S-Para meters to 40GHz.
For extracting the values of the derived scalable model parameters in Fig.2~Fig.5, twenty-five RF MOSFETs are usedwith various geometry(the per-fingerw idth(Wf)of each device is 1,2,5,7.5,10 μm,andLength(L)for each device is0.18,0.35,0.50,1,2 μm),and ten RF MOSFET swith different number of gate fingerswith fixed fingerwidth at 2.5 μm,length at 180 nm,and finger numbers of 1,2,4,8,12,16,24,32,48,64.Resistances are extracted by using the methodm entioned in the Section 2.2.
As shown in Figs.2,3 and 4 the source resistance is proportional to 1/Wf,L and 1/NF respectively,therefore follow ing equation is proposed:
Where RSW1andRSW2are considered resistence-dependence of source w idth,RSLare considered Rsof Length dete rmined.RSNFare considered Rsof finger-deter m ined ofRs.They are extracted by a curve-fitting procedure tomatchwith extractedWf-,L-andNFf-de-pendent data of source resistance in Figs.2,3 and 4.
Fig.5,6 and 7 show the drain resistance changes with respect to transistor geometry,it shares the same equation with source resistance:
W hereRDW1,RDW2,RDNFandRDLare curve-fitting parameters used to account forWf,L andNF dependent data of drain resistance,respectively.
Fig.2 Measured andmodeledRsversusWfat differentL
Fig.3 Measured and modeledRsversusL at differentW
Fig.4 Extracted andmodeled value ofRsat differentnumber ofgate finger
Fig.5 Measured andmodeled RdversusW at differentL
Fig.6 Measured andmodeled RdversusL at different W
Fig.7 Extracted and modeled value ofRdat different number of gate finger
In order to validate the above work,series resis-t ance has been add to new industrial standard PSP model which is joint developed by Arizona StateUniversity and NXP Sem iconductorResearch,it is suitable for digita,l analogue,RF design[10]. Fig.8 shows the sche matic used for RF s imulation with added parasitics based on PSP core.Good agreements betweenmeasured andmodeled I-V andS-para meters curve are as shown in Fig.9 to Fig.10.Solid line represents that s imulated mode,l and square representsmeasured data.These correspondences verify that above series resistance extraction technique is accurate and reliable.
Fig.8 EquivalentRF macro modelbased on PSP used for RF s imulation
Fig.9 Co mparison ofDC characteristic,IDS-VGS(a),Gm(b),IDS-VDS(c),Gds(d),ofNMOS forWf=2.5 μm,L=0.13 μm,NF=16
Fig.10 Comparisons ofmeasured and s imulated S-parameters,s11(a),s12(b),s21(c),s22(d),ofNMOS forWf= 2.5 μm,L= 0.13 μm,NF= 16,biased atVDS=0.5,0.75,1,1.25,1.5 V and VGS=0.45,0.9,1.35,1.8 V
Precise modeling series resistances are great important for RF-MOSFET Modeling.In this paper,an S-para metermeasure ment to Z-parameter analysis analyticalm ethod to extract series resistances ofRF silicon MOSFET has been presented.And the scalable rules for these resistances have been derived.Making a com-perison betweenmeasured parameters of IV and S and modeled parameters of IV and S,their good correspondances verify that the extraction method is reliable.Thiswork hopes to incorporate into the develop ment of compact RF model library to support high-frequency mixed-signal circuit design.
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余裕寧(1986-),男,漢族,浙江建德人,現(xiàn)為杭州電子科技大學(xué)射頻電路與系統(tǒng)教育部重點(diǎn)實(shí)驗(yàn)室碩士研究生,主要研究方向?yàn)槲㈦娮悠骷7较虻难芯?yuyuning126@126.co m;
孫玲玲(1956-),女,漢族,浙江杭州市人,教授,博士生導(dǎo)師,主要研究方向?yàn)榧呻娐?CDA(電子設(shè)計(jì)自動化)、RF集成電路設(shè)計(jì)及光電集成、集成電路應(yīng)用系統(tǒng)設(shè)計(jì)。